pastermil@sh.itjust.works to Programmer Humor@lemmy.ml · 3 months agoSome Mnemonicssh.itjust.worksimagemessage-square19fedilinkarrow-up1344arrow-down16
arrow-up1338arrow-down1imageSome Mnemonicssh.itjust.workspastermil@sh.itjust.works to Programmer Humor@lemmy.ml · 3 months agomessage-square19fedilink
minus-square9point6@lemmy.worldlinkfedilinkarrow-up26·3 months agoI still don’t know why this architecture went for a Double XOR as the NOP, I guess they were just flexing that the reference chip design could do both in a single cycle
I still don’t know why this architecture went for a Double XOR as the NOP, I guess they were just flexing that the reference chip design could do both in a single cycle